Universidad de Costa Rica

Transaction level platform modeling in systemc for multi-processor designs

Ing. Lochi Yu Lo, PhD.
Lochi Yu and Samar Abdi and Daniel Gajski
Center Embedded Comput. Syst., Univ. California, Irvine, Irvine, CA


This report describes Transaction Level Platform Modeling in SystemC for MPSoC designs. The MPSoC platform is a net-list of processing elements, busses and bridge elements. The Processing Elements which can host a process (a C program) or memory. Busses, modeled as Universal Bus Channels (UBCs), offer communication functions for these processes and bridge elements (transducers) link different busses together. This platform yields an executable Transaction Level SystemC model, and has the advantage that the designer can use the existing C code and will yield a completely simulatable platform. To test the modeling style, 2 different platforms of a H264 decoder were developed and tested successfully. This report describes the internal structure of the busses, processing elements, and transducers of this model.

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